Course Duration : 60Hrs.
Course on VLSI System Design cover digital circuit design and implementation of digital circuits using Cerilog Hardware Description Language (HDL). It also deal with compilation, elaboration, simulation and Implementation of Design in FPGA.
 Digital Design
Various levels of Verilog HDL programming
Delays and Timing Controls
Tasks and Functions
UDP
Project in system level Design
Testbench creation
Setting up the simulation environment
Design Compilation
Design Elaboration
Simulation
Debugging with textual interface
Debugging with graphical interface
Project Design
Implementation of Design in FPGA
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